5 classes

16 bit general purpose

    • AX, BX, CX, DX, BP, SI, DI SP
    • present in 8086, 8088, 80286 procs
    • only BX works in base indexed displacement addressing (e.g. mov AX, [BX + DI + 7]) which is convenient for 2-level lookup tables (LUT is a table of tables). In this case, BX would be the address of the start of the table, DI would be the offset to the start of the entry you want, and 7 would gather the data 7 bytes in from within that entry.

32 bit extended general purpose

    • EAX, EBX, ECX, EDX, EBP, ESI, EDI, ESP
    • The 16 bit gp's are simply the lower 16 bits of their E counterparts
    • However, there is no register for the upper 16 bits!

8 bit register halves

    • EAX, EBX, ECX, EDX are also broken down into upper and lower 8 bit registers (e.g. AH and AL)
    • Handy when doing 8 bit manipulation work; almost gives you twice as many registers to work in.

Instruction pointer

    • Always contains offset address of the next machine instruction to run in the current code segment (an area of memory where machine instructions are stored, pointed to by CS).
    • ?? implication: it's easy to use 128 KB without moving my segments; code sits in one segment and data in another ??
    • Instructions can be 1-6 bytes long. IP bumps up by the size of the instruction after it executes
    • Only register you can not directly read or write to

Flags

    • Called FLAGS (16 bits) on pre-386's, or EFLAGS (32 bits) on later procs
    • Each bit is a flag, and each has a name (CF, DF, OF, ...)
    • Almost never directly dealt with


EM64T

REGISTER      USAGE              SAVE
%rsp      Stack pointer      YES
%rbx      optional base pointer   YES
%rbp      optional frame pointer  YES
%rax      integer return val      NO
%rdi      1st int arg             NO
%rsi      2nd int arg             NO
%rdx      3rd int arg             NO
%rcx      4th int arg             NO
%r8       5th int arg             NO
%r9       6th int arg             NO
%r10      used to pass static chain pointer   NO
%r11      scratch reg             NO
%r12-15   callee-saved regs       YES
%xmm0-1   pass & return fp args   NO
%xmm2-7   pass fp args            NO
%xmm8-15  scratch regs            NO
%mmx0-7   scratch regs, aliased to fp stack   NO
%st        returns long double args  NO
     aliased with mmx regs     
%st1-7    scratch regs, aliased with mmx    NO

-- MattWalsh - 15 Apr 2004

Topic revision: r3 - 20 Jan 2006 - MattWalsh
 
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